1. Field of the Invention
The present invention relates in general to a testing apparatus and method of an organic light emitting diode (hereinafter referred to as OLED) array. More specifically, it relates to the testing apparatus and method of checking for defective pixel units of an active matrix OLED panel.
2. Description of the Related Art
Newly developed flat-plane displays, succeeding cathode ray tube (CRT) displays and liquid crystal displays (LCDs), are OLED displays. OLED displays have the advantages of self-emitting light, high luminance, wide viewing angle, and a simple fabricating process, etc., therefore hold appeal for researchers lately. An OLED emits light by using an organic light-emitting layer disposed between the anode and cathode thereof. The organic light-emitting layer is composed of dyes or high polymers.
FIG. 1 shows the schematic structure of a general OLED in a cross-sectional view. As depicted in FIG. 1, numeral 1 shows a substrate which generally is made of glass material and serves as an emitting plane. Numeral 3 shows an anode layer which is transparent and made of metal oxide such as ITO (indium tin oxide) with good conductivity and is also pervious to light. Numeral 5 shows an organic layer supposed to have highly efficient fluorescence. Numeral 7 shows a cathode layer generally made of a metallic alloy. Physically, respectively connecting the anode layer 3 and cathode layer 7 to a positive electrode and negative electrode is equivalent to injecting holes and electrons into the organic layer 5. After the holes and electrons overcome the respective energy gaps, excitons are generated in the organic layer 5. The excitons decay from an excited state to a fundamental state, thereby radiating light for releasing energy. The anode layer 3 and substrate 1 are transparent and the light radiates along the arrow direction as depicted in FIG. 1.
In general, OLED displays include two driving types: passive matrix and active matrix. In a passive matrix OLED display, an organic layer is deposited between cathode electrode lines and anode electrode lines, wherein the cathode electrode lines are perpendicular to the anode electrode lines, thereby forming an array of OLEDS. Furthermore, switches corresponding to the OLED circuit are used to control the light emission of OLEDS. FIG. 2 shows the circuit diagram of a conventional passive matrix OLED display. In FIG. 2, OLED panel 9 comprises cathode electrode lines 10 perpendicular to anode electrode lines 12. The diode at the cross section of any cathode electrode line 10 and any anode line 12 represents a corresponding pixel unit 20. Anode electrode lines 12 couples current sources 14 via switches 18 and cathode electrode lines 10 are coupled to a ground via switches 16. In practical operation, the scan lines corresponding to the cathode electrode lines 10 are sequentially turned on, i.e. the corresponding switches 16 are conducted, to be grounded. Further, each of the pixel units 20 can be selectively lit by controlling the switches 18. To the passive matrix OLED, its simple structure is the main advantage favorable to fabricating cost and benefit. However, the passive matrix OLED operates under short-pulse mode, therefore requiring higher operating voltage. Also, the passive matrix OLED has a low efficiency of light emission.
In an active matrix OLED display, each of the OLEDs is coupled with an independently connected driving circuit. FIG. 3 shows the circuit diagram of a conventional active matrix OLED display. In FIG. 3, numeral 50 means a switching TFT (thin-film transistor), numeral 52 means a storage capacitor, numeral 54 means a driving TFT, and numeral 56 means an OLED. In addition, numeral 30 means a signal line, numeral 40 means a scan line, numeral 32 means a power supply line, numeral 42 means a capacitor line, and numeral 44 means a common line.
The gate and source of the switching TFT 50 respectively connect to the scan line 40 and the signal line 30. The drain of the switching TFT 50 connects to the storage capacitor 52. A scan signal is provided via the scan line 40 to control the state of the switching TFT 50. When the switching TFT 50 is in conducted state (or turned on), logic signals at the signal line 30 are transmitted to node A. In addition, the other terminal of the storage capacitor 52 connects to the capacitor line 42. Generally every capacitor line 42 of all pixel units in an OLED panel is commonly connected. The logic signal at node A is coupled to the gate of the driving TFT 54, and the source and drain of the driving TFT 54 respectively connect to the power supply line 32 and the anode of the OLED 56. The cathode of the OLED 56 connects to common line 44. When the logic signal at node A turns on the driving TFT 54, the path from the power supply line 32, driving TFT 54, OLED 56 to common line 44 forms a loop and the OLED 56 emits light. When the driving TFT 54 is not in a conducted state (turned off), OLED will not emit light. In addition, generally every power supply line 32 and common line 44 of all pixel units in the OLED panel are respectively connected together; wherein the power supply line 32 couples to a positive voltage, and the common line 44 is grounded.
As described above, the driving TFT structure of the active matrix OLED is partially similar with that of a LCD panel, for example the switching TFT 50 and the storage capacitor 52. However, the pixel unit structures of the OLED and LCD are different. Therefore, the conventional apparatus for testing the LCD panel is not appropriate for the OLED panel.
FIG. 4 shows a conventional testing scheme for an active matrix LCD panel. In FIG. 4, numeral 62 and 60 mean a control transistor and storage capacitor corresponding to a pixel unit and the gate of the control transistor connects to a scan line 72. Numeral 74 means a testing point, the input position of image signals. Testing apparatus comprises a switch 65, a voltage source 69, and a judging device 67. The switch 65 controls the selection of connecting the judging device 67 or voltage source 69 to the testing point 74. The way of testing is described as follows. First, the switch 65 is switched to couple the voltage source 69 to the storage capacitor 60 so as to store charge in the storage capacitor 60 (i.e. node Axe2x80x2). Next, hold the charge stored in the storage capacitor 60 for a period of time, and then switch the switch 65 to the judging device 67. The judging device 67 reads out (detects) the charge stored in the storage capacitor and determines whether the pixel unit is perfect or defective.
Accordingly, it is not able to completely test a general OLED pixel unit by virtue of the testing scheme for a conventional active matrix LCD panel as shown in FIG. 4. The reason is that the testing scheme cannot be applied to test the driving TFT 54 and OLED 56 depicted in FIG. 3.
Therefore, an object of the present invention is to provide an apparatus and method of testing an OLED array (or panel), capable of completely finding out whether the pixel units in the OLED array are perfect or defective.
The present invention achieves the above-indicated objects by providing a method of testing an OLED array, which has a plurality of pixel units and each of the pixel units comprises a commonly shared power supply line and a commonly shared common line. First, a current meter and a voltage source are provided and connected in serial between the common line and power supply line. Then, a first logic value (for example, logic xe2x80x9c1xe2x80x9d) is sequentially written to the pixel units and first current readings corresponding to the written pixel units are taken by virtue of the current meter. Finally, whether or not the pixel units are defective is determined according to the first current readings corresponding to the written pixel units; further, when a pixel unit is determined to be defective, the defective type of the defective pixel unit is determined according to the first current reading corresponding to the defective pixel unit and the first current readings corresponding the other perfect pixel units. In addition, a second logic value (for example, logic xe2x80x9c0xe2x80x9d) can be sequentially written to the pixel units and second current readings corresponding to the written pixel units that are taken by virtue of the current meter. The defective type of the defective pixel unit can be determined according to the first and second current readings corresponding to the defective pixel unit and the first and second current readings corresponding the other perfect pixel units when the pixel unit is determined to be defective. In addition, the testing method includes the testing of the storage capacitor so as to detect short-circuited defects. The steps of testing the storage capacitor are (1) storing charges in the pixel units, (2) reading the charges stored in the pixel units after a specific time period; and (3) determining whether the pixel units are defective according to the readings of the charges.
The present invention also provides an apparatus of testing an OLED array that comprises a voltage source for providing a bias voltage to the power supply line and common line; a writing circuit for sequentially writing a first logic value to the pixel units; a current meter serially connected with the voltage source for reading the currents passing between the power supply line and common line and generating first current readings corresponding to the pixel units; and a determining portion coupled to the current meter for determining whether the pixel units are defective according to the first current readings corresponding to the pixel units. The determining portion also determines the defective type of the defective pixel unit according to the first current reading corresponding to the defective pixel unit and the first current readings corresponding the other perfect pixel units. Moreover, the writing circuit also can sequentially write a second logic value to the pixel units and the current meter takes second current readings corresponding to the written pixel units. The determining portion determines whether the pixel units are defective according to the first and second current readings corresponding to the pixel units. Also, the determining portion determines the defective type of a defective pixel unit according to the first and second current reading corresponding to the defective pixel unit and the first and second current readings corresponding to the other perfect pixel units when the pixel unit is defective.